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Data Sheet, V1.0, Aug. 1999
FOA3251B1
High Speed Clock and Data Recovery for Fiber Optic Applications
ICs for Communications
Never
stop
thinking.
FOA3251B1 S1028C1 Revision History: Previous Version: Page
1999-08
V1.0
Subjects (major changes since last revision) Document's layout has been changed: 2002-Sep.
For questions on technology, delivery and prices please contact the Infineon Technologies Offices in Germany or the Infineon Technologies Companies and Representatives worldwide: see our webpage at http://www.infineon.com. ABM(R), AOP(R), ARCOFI(R), ARCOFI(R)-BA, ARCOFI(R)-SP, DigiTape(R), EPIC(R)-1, EPIC(R)-S, ELIC(R), FALC(R)54, FALC(R)56, FALC(R)-E1, FALC(R)-LH, IDEC(R), IOM(R), IOM(R)-1, IOM(R)-2, IPAT(R)-2, ISAC(R)-P, ISAC(R)-S, ISAC(R)-S TE, ISAC(R)-P TE, ITAC(R), IWE(R), MUSAC(R)-A, OCTAT(R)-P, QUAT(R)-S, SICAT(R), SICOFI(R), SICOFI(R)-2, SICOFI(R)-4, SICOFI(R)-4C, SLICOFI(R) are registered trademarks of Infineon Technologies AG. ACETM, ASMTM, ASPTM, POTSWIRETM, QuadFALCTM, SCOUTTM are trademarks of Infineon Technologies AG.
Edition 1999-08 Published by Infineon Technologies AG, St.-Martin-Strasse 53, 81669 Munchen, Germany
(c) Infineon Technologies AG 2002.
All Rights Reserved. Attention please! The information herein is given to describe certain components and shall not be considered as warranted characteristics. Terms of delivery and rights to technical change reserved. We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding circuits, descriptions and charts stated herein. Infineon Technologies is an approved CECC manufacturer. Information For further information on technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies Office in Germany or our Infineon Technologies Representatives worldwide. Warnings Due to technical requirements components may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies Office. Infineon Technologies Components may only be used in life-support devices or systems with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system, or to affect the safety or effectiveness of that device or system. Life-support devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered.
FOA3251B1 S1028C1
Preface
The transceiver IC FOA3251 is designed for fibre optic application in the data bit range of 2.5 GBit. The FOA3251 fulfills the jitter requirements specified in ITU G958 and Bellcore GR253. Organization of this Document This Data Sheet is divided into 8 chapters. It is organized as follows: * Chapter 1, Overview Gives a general description of the product , lists the key features, and presents some typical applications. * Chapter 2, Functional Description Lists pin locations with associated signals, categorizes signals according to function, and describes signals. Blockdiagram and block description. * Chapter 3, Operational Description * Chapter 4, Electrical Characteristics DC and AC Characteristics, Power consumption, interface specification. * Chapter 5, External Components Application notes and recommended suppliers * Chapter 6, Measurement Results * Chapter 7, Package Outlines
Data Sheet
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FOA3251B1 S1028C1
Table of Contents 1 1.1 1.2 2 2.1 2.2 2.3 2.4 3 3.1 4 4.1 4.2 4.3 4.4 5 6 7 Page
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Pin Configuration (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Pin Definition and Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Functional Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Functional Block Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 6 7 9 9
Operational Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Operating States of Delay Line . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Operating Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 12 12 13 13
External Components . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Measurement Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Data Sheet
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V1.0, 1999-08
High Speed Clock and Data Recovery for Fiber Optic Applications
FOA3251B1 S1028C1
BIPOLAR
1
Overview
The transceiver IC FOA3251 is designed for fibre optic application in the data bit range of 2.5 GBit. The FOA3251 fulfills the jitter requirements specified in ITU G958 and Bellcore GR253.
1.1
Features
P-LQFP-48-1 * Data rate up to 2.633 Gb/s P-LQFP-48-1 * All jitter data meet ITU-T G958 and GR-253-Core requirements * Supply range from +3.0 V to 5.0 V * Supply current < 210 mA * Input sensitivity < 5 mVpp differential (BER = 10-12) * Loss of signal (LOS) detection * Programmable delay element to adjust clock- to data output * Lock indication
1.2
Applications
* Fibre optic communication systems * SDH / SONET / ATM applications
Type FOA3251B1
Data Sheet
Ordering Code
Package P-LQFP-48-1
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FOA3251B1 S1028C1
Functional Description
2
Functional Description
The FOA3251 consists of a clock and data recovery block (CDR), a clock multiplier unit (CMU) and a programmable delay line.
2.1
Pin Configuration (top view)
36 35 34 33 32 31 30 29 28 27 26 25 LLOS N2V5 37 38 39 40 41 42 43 44 45 46 47 48 1 2 3 4 5 6 7 8 9 10 11 12 P-LQFP-48-1 24 23 22 21 20 19 18 17 16 15 14 13
VEE VCC alarm LOL LOS RESET XTAL IN XTAL OUT VCC VCC DELAY2 DELAY1 DELAY0
VCC DATA IN VCC DATA IN VCC VF01 VCC PLL1 UP PLL1 DN TEST
VCC VCC VCC CLK TR CLK TR VCC DATA TR DATA TR VCC VCC VEE VEE
TESTLOS
TESTCLK
VCC VCC VCC VCC VCC PLL2 DN PLL2 UP VF02
VCCLC
VEELC
ITP11416
Figure 1
Pin Configuration
Data Sheet
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FOA3251B1 S1028C1
Functional Description
2.2
7
Pin Definition and Function
Pin Definition and Function Input (I) Function Output (O) In In Can be open. Can be open. In Out Out In Can be open. Inverted down signal from PLL2 Inverted up signal from PLL2 Control voltage for VCO2 VCC VCO2 VEE VCO2 Clock signal for test mode only
Table 1 Pin Symbol 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28
TESTCLK TESTLOS VCC VCC VCC VCC VCC PLL2 DN PLL2 UP VF02 VCCLC VEELC VEE VEE VCC VCC DATA TR DATA TR VCC CLK TR CLK TR VCC VCC VCC DELAY0 DELAY1 DELAY2 VCC
Out Out Out Out
Inverted recovered data signal Recovered data signal Recovered clock signal Inverted recovered clock signal
In In In
Delay select bit 0. (See Table 2) Delay select bit 1. (See Table 2) Delay select bit 2. (See Table 2)
Data Sheet
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FOA3251B1 S1028C1
Functional Description Table 1 Pin Symbol 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 VCC XTAL OUT Out XTAL IN RESET LOS LOL VCC alarm VEE LLOS N2V5 VCC DATA IN VCC DATA IN VCC VF01 VCC PLL1 UP PLL1 DN TEST In Inverted up signal PLL1 Inverted down signal PLL1 Test mode on/off In Control voltage VCO1 In Data input (no ESD) In Inverted data input (no ESD) In In Adjustment for Level LOS Negative supply voltage for VCO1 In In Out Out Crystal Crystal Reset for test mode only Loss of signal (ESD only to VEE) Loss of Lock VCC alarm supply. Max. 5 V, Min 0 V = VCC (no ESD) Pin Definition and Function (cont'd) Input (I) Function Output (O)
Data Sheet
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FOA3251B1 S1028C1
Functional Description
2.3
Functional Block Diagram
LOL Delay Line REFCLK FWD CDR VCO VCO Loop Filter CMU TRCLK
Recovered Clock
PFD
Loop Filter
Postamp DATA PD Recovered DATA C D TRDATA
LOS
ITB11417
Figure 2
Block Diagram
2.4
Functional Block Description
The clock and data recovery block (CDR) consists of a bang-bang phase detector (PD), a frequency window detector (FWD) and a VCO. The PD also provides a kind of statistical BER signal that is used to generate a loss of signal (LOS) signal. The FWD moves the VCO in the right frequency range. The frequency window is about 10000 ppm of the center frequency. When the frequency is out of range a los of lock signal (LOL) is generated. The center frequency is given by a reference clock signal which is (signal frequency)/128. The VCO is a 3 stage ring oscillator type. The clock multiplier unit (CMU) consist of a phase frequency detector (PFD), a VCO and a retiming Flip-Flop. The PFD is type 4 phase and frequency detector. The low pass filtered PFD signal as a function of the phase error is shown in Figure 3.
Data Sheet
9
V1.0, 1999-08
FOA3251B1 S1028C1
Functional Description
Vpfd Kd2
-4
-2 2 4 e
-Kd2
ITD11418
Figure 3
PFD Characteristic
The VCO is a LC type with a center frequency of 2.5 GHz. The measured tuning range is shown in Figure 4.
3 GHz 2.8
ITD11419
Frequency
2.6 m25 Center Freq. [GHz] 20 Center Freq. [GHz] 85 Center Freq. [GHz]
2.4
2.2
2
0
-1
-2 Tuning Voltage
V
-3
Figure 4
Tuning Range LC VCO
The delay line is programmable in 8 steps of about 50 ps. The clock signal is adjustable over 1 period (400 as) and can be easily adapted to different applications.
Data Sheet 10 V1.0, 1999-08
FOA3251B1 S1028C1
Operational Description
3
3.1
Operational Description
Operating States of Delay Line
For clock to data output adjustment a adjustable delay line is available. The clock output signal is adjustable by the signals DELAY0..2. Table 2 DELAY0 LOW LOW LOW LOW HIGH HIGH HIGH HIGH Truth Table Delay Line DELAY1 LOW HIGH LOW HIGH LOW HIGH LOW HIGH DELAY2 LOW LOW HIGH HIGH LOW LOW HIGH HIGH Delta 0 ps 50 ps 100 ps 150 ps 200 ps 250 ps 300 ps 350 ps
Data Sheet
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FOA3251B1 S1028C1
Electrical Characteristics
4
4.1
Table 3 Parameter
Electrical Characteristics
Absolute Maximum Ratings
Absolute Maximum Ratings Symbol Limit Values min. max. 6 VS Tstg VDDP VESD,HBM -0.4 -40 VEE - 0.5 VDDP + 0.4 125 150 VCC 500 Package V C V Unit
IC supply voltage (VCC - VEE) Voltage on any pin Maximum junction temperature Storage temperature Protection supply voltage ESD robustness HBM: 1.5 k, 100 pF Lead temperature range
The RF Pin 40, 42 are not ESD protected. The high frequency performance prohibits the use of a adequate protective structure. Pin 33 is only protected to VEE.
4.2
Table 4 Parameter
Operating Range
Operating Range Symbol TA VDD -40 3.0 Limit Values min. max. 85 5 C V Unit
Ambient temperature Supply voltage
Data Sheet
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FOA3251B1 S1028C1
Electrical Characteristics
4.3
Table 5 Parameter
DC Characteristics
DC Characteristics Symbol VIL VIH Ioc IEE (AV) Limit Values min. max. V VCC 8 200 0.45 TBD mA mA VCC - 1 Unit
Control and Test inputs Output current CML Pin 17, 18, 20, 21 Supply current
4.4
Table 6 Parameter
AC Characteristics
Electrical Characteristics Condition min. Limit Values typ. max. VCC 10 2 10 BER < 10-12 BER < 10-12 TBD TBD 2.5 50 Package 0.8 GHz pF V mV V mV A V Unit
Quantisizer DC Characteristics1) Input Voltage Range2) Input Sensitivity, Vsense Input Overdrive, Vod Input Offset Voltage Input Current Input RMS Noise Input Pk-Pk Noise Quantisizer AC Characteristics Upper -3 dB Bandwidth extern) Input Resistance Input Capacitance Pulse Width Distortion VSWR 2.5 Pin or Nin Pin-Nin, BER < 10-12 Pin-Nin, BER < 10-12 VEE +2.5
Data Sheet
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FOA3251B1 S1028C1
Electrical Characteristics Table 6 Parameter Level Detect Response Time Hysteresis (Electrical)
3)
Electrical Characteristics (cont'd) Condition min. AC coupled 1 VCC alarm = 5 V VEE alarm = GND VCC alarm = GND VEE alarm = -5 V 4.5 1 -0.5 -4 2.48832 -0.2% x f0 -0.2% x f0 -3.6 100 +0.2% x f0 +3.6 deg. Bit GHz +0.2% x f0 GHz Limit Values typ. max. 95 3 s db V Unit
ALM Output Logic High4) ALM Output Logic Low ALM Output Logic High ALM Output Logic Low Phase-Locked Loop Nominal Center Frequency f0 Capture Range5) Tracking Range Static Phase Error6) Phase drift7) Jitter
SONET STS-48 Frame (with Scrambler 2E7-1) and 2E23-1 PRN Sequence ITU-T G958 and Gr-253-Core objective < 0.005 UIrms (2ps) SONET STS-48 Frame (with Scrambler 2E7-1) and 2E23-1 PRN Sequence ITU-T G958 and Gr-253-Core SONET STS-48 Frame (with Scrambler 2E7-1) and 2E23-1 PRN Sequence ITU-T G958 and Gr-253-Core Referenced to VCC 0 400 46 54 V V
Jitter Tolerance Jitter Transfer Open collector output Voltage levels Output logic High, Voh Output logic Low, Vol Symmetry (Duty Cycle) Recovered Clock Output
Data Sheet
14
V1.0, 1999-08
FOA3251B1 S1028C1
Electrical Characteristics Table 6 Parameter Output Rise/Fall Times Clock Output Rise Time Fall Time Data Output Rise Time Fall Time Control and test inputs8) Input logic High, Vih Input logic Low, Vil Control and test outputs Output logic High, Vih Output logic Low, Vil Power Supply Voltage Power Supply Current9) Operating Temperature Package Ambient Bare Chip Ambient Bare Chip Size
1) 2) 3) 4)
Electrical Characteristics (cont'd) Condition min. Limit Values typ. max. Unit
20% - 80%, 50 20% - 80%, 50
100 100
ps ps
20% - 80%, 50 20% - 80%, 50 Referenced to VCC
120 120 0 -1
ps ps V V V V 5.8 V mA +85 +100 C C
Referenced to VCC 0 -1 3 5 210 -40 -40 < 3.0 mm x 3.0 mm
5)
6) 7) 8) 9)
Min value Pin, Nin: VCC-Pin, Nin < 800 mV Voltage (Pin-Nin) = 4 mVpp @Pin = -23 dBm Hysteresis can be installed by a combination of Signal LOS and LLOS. Open Collector Output type, I = 2 mA. Datarate depends on output load. Termination with pullup resistor > 4.7 k No skipping clock cycles allowed down to < 10-3 BER External adjustable. Clock drift with no input 25 MHz The alarm shall be asserted before 500 ns of phase shift on the RX clock is realized. Consecutive identical bits 72 bits. Supply current = IEE ( current without ECL output current).
Data Sheet
15
V1.0, 1999-08
FOA3251B1 S1028C1
External Components
5
External Components
Crystal
Integrator
Integrator
Data IN
Infineon - FOA3251B1 2.488 Gb/s Transceiver and Clock/Data Recovery
Data OUT Clock OUT
Reference Voltage
ITS11420
Figure 5
External Components Required for Operation of FOA3251B1
Table 7 Device
External Devices Number 1-2 1 10 5 14 1 2 Toyocom TSX-2 muRata BLM11B601S Recommended Types Remark TL 431 Burr Brown OPA2353 Burr Brown OPA2350 2.5 V VCO Supply Integrator Integrator, Blocking Integrator, Reference voltage 19.44 MHz VEE blocking to GND (VCC)
Reference Voltage Operational Amplifier Capacitor Resistor Crystal Oscillator Ferrite Bead Inductor
The external circuits are shown in Figure 6, Figure 7, Figure 8 and Figure 9.
Data Sheet
16
V1.0, 1999-08
FOA3251B1 S1028C1
External Components
2.5 V Referenz Voltage
VCC
1 TL431 2, 3 6, 7 10 F 5 N2V5 100 nF
56
VEE
Resistor has to be adapted to supply voltage. 3.3 V 56 5.0 V 80
ITS11421
Figure 6
Reference Voltage for VCO (Ring Oscillator).
FOA3251
VCC
100 100 pF 100 pF 100 nF PLL1 DN 1k 100 100 nF
VCC
800
800
VF01
PLL1 UP 1k 100
100 nF
ITS11422
Figure 7
Loop Filter PLL1 (CDR)
Data Sheet
17
V1.0, 1999-08
FOA3251B1 S1028C1
External Components
FOA3251
VCC
1.5 k 10 pF 10 pF 47 nF PLL2 UP 6.8 k 100 470 fF
VCC
800
800
VF02
PLL2 DN 6.8 k 1.5 k
47 nF
ITS11423
Figure 8
Loop Filter PLL2 (CMU)
TSX-2 XTAL IN XTAL OUT
33 pF
56 pF
VCC
ITS11424
Figure 9
Crystal Oscillator
Data Sheet
18
V1.0, 1999-08
FOA3251B1 S1028C1
Measurement Results
6
Measurement Results
All measurements were done with 50 mVpp input swing and a 2E23 bit sequence. Temperature was 25C, supply voltage was 3.3 V.
ITD11425
102
101
100
10-1 101
102
103
104
105
106
Hz 107
Modulation Frequency
Figure 10
STM 16 Jitter Tolerance
10
ITD11426
0
-10
-20
-30 101
102
103
104
105
106
Hz 107
Modulation Frequency
Figure 11
Data Sheet
STM 16 Jitter Transfer
19 V1.0, 1999-08
FOA3251B1 S1028C1
Measurement Results
Jitter Generation Results Cutoff Frequency = 12.000 kHz 16.281 mUI p-p 2.516 mUI rms
ITD11427
Figure 12
Gitter Generation Results
Data Sheet
20
V1.0, 1999-08
FOA3251B1 S1028C1
Package Outlines
7
Package Outlines
P-LQFP-48-1 (Plastic Low Profile Quad Flat Package)
0.125 +0.075 -0.035
1.4 0.05
1.6 MAX.
0.1 0.05
H
0.6 0.15
0.5 5.5 0.22 0.05 2)
C 0.08 0.08
M
A-B D C 48x 0.2 A-B D 48x 0.2 A-B D H 4x
3.96 0.05 1.76 x 45
9
7 1)
D A B
7 1)
48 Heatslug 1 Index Marking 1) Does not include plastic or metal protrusion of 0.25 max. per side 2) Does not include dambar protrusion of 0.08 max. per side
9
7 MAX.
GPP09269
Figure 13
You can find all of our packages, sorts of packing and others in our Infineon Internet Page "Products": http://www.infineon.com/products. Data Sheet 21
Dimensions in mm V1.0, 1999-08
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FOA3251B1 S1028C1
Variables Target Specification
Variable Name Business Unit Dev_NameLong1
Variable Definition ICs for Communications High Speed Clock and Data Recovery for Fiber Optic Applications
Description Long product name
Dev_NameLong2 Dev_NameLong3 Dev_NameLong4 Dev_NameShort1 Dev_NameShort2 Dev_NameShort3 Dev_NameShort4 Dev_Package1 Dev_Package2 Dev_Package3 Dev_Package4 Dev_Version1 Dev_Version2 Dev_Version3 Dev_Version4 Device1 Device2 Device3 Device4 Doc_Author Doc_ConfidentialStatus FOA3251B1 P-LQFP-48-1 FOA3251B1 Author of the document CONFIDENTIAL", "PRELIMINARY" or left blank Marketing/sales name Device version Package type Short product name
Data Sheet
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V1.0, 1999-08
FOA3251B1 S1028C1
Variable Name Doc_Distribution
Variable Definition
Description "Distribution with NDA" or "Distribution by marketing only" or "Distribution with NDA by marketing only" or left blank
Doc_IssueDate Doc_State Doc_TopRight1 Doc_TopRight2
1999-08 V1.0 FOA3251B1 S1028C1
Complete date of releasing the document Revision state of the document Defines the expression appearing on the top right of the page layout Document type
Doc_Type Doc_Type_Cover Modification Date Short Status Technologie Title_IssueDate
Data Sheet Data Sheet
Document type Document type
BIPOLAR Aug. 1999 Issue date of the document appearing on the upper right corner of the 1st cover page
Data Sheet
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V1.0, 1999-08
FOA3251B1 S1028C1
Instructions Defining all variables 1. Double-Click on the Variable Definiton that you want to define. 2. Choose "Edit Definition" 3. In the variable dialog box redefine the user variable in the "Definition" box. If this variable should not be defined, enter a blank. 4. Click on "Change". 5. Click "Done" to return to the variable dialog box. 6. Click "Done" again. Importing the variables into the FrameMaker document/book 1. Make certain that both documents (your FrameMaker file/book and file variables.fm) are open. 2. From the "File" menu, click on "Import". 3. Select "Format". 4. From the "Import from File" (document) pop-up list, choose "variables.fm". 5. From the "Import and Update" box, make sure that only the "Variable Definition" check box is selected. Click on "Import" to finish.
Data Sheet
25
V1.0, 1999-08

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